IOx expansion bus

Description

In its original form, the Durango-X home computer has very limited I/O: a single-bit beeper, the interrupt enable port and, most importantly, the built-in video output. But almost any other device can be connected via the IOx expansion bus, which is an 8-bit parallel bus with 16 addresses, for easy daisy-chaining of peripherals.

The main PCB bears a single IOx connector; but the proposed keyboard+gamepads interface (which, incidentally, connects to the main PCB thru that) has 2 IOx connectors for convenience. As noted below, this standard interface board takes three addresses for all its supplied devices (keyboard, gamepad1, gamepad2).

Connector Pinout

The IOx bus uses a readily available IDC-16 socket which prevents reverse insertion; but regular 1/10" pin headers and sockets may be used, even DuPont connectors for testing purposes. If a board has more than one IOx socket, they'll be connected in parallel, thus completely interchangeable.

IOx connector seen from above (component side):

	Bottom	Top	Shroud
#	#####	#####	#
#	`+5V`	`PD0`	#
#	`BA0`	`PD1`	#
#	`BA1`	`PD2`	#
	`BA2`	`PD3`	#
	`BA3`	`PD4`	#
#	`/WR`	`PD5`	#
#	`/SEL`	`PD6`	#
#	`GND`	`PD7`	#
#	#####	#####	#

Sidecar connector

Besides the IDC socket, Durango-X has a right-angle pin socket for bigger peripherals which should lay levelled with the main PCB. Pinout is the same, although with the bottom and top rows swapped.

Signal descriptions

Signal	Description	Direction (rel. CPU)	Notes
`+5V`	Power	Power Output	Most peripherals could take power from this line. Maximum recommended power draw: 350 mA (combined).
`GND`	Ground	Power Output	Mandatory connection, even is the peripheral is self-powered.
`PD0-PD7`	Peripheral Data Bus	Input/Output	Must be kept in high-impedance state when `/SEL` is high.
`BA0-BA3`	Buffered Address Bus	Output	Constantly exposing the CPU's lower address bits.
`/WE`	Write Enable	Output	Active low when the CPU writes to the peripheral; not qualified, must be set around the same time as `BAx`.
`/SEL`	IOx Select	Output	Active low when the CPU interacts with the IOx bus; must be qualified via the Clock signal.

Note

Peripherals can not ask for CPU attention, other than polling.

Warning

The maximum current draw for peripheral boards (350 mA) is based on the USB standard guaranteed 500 mA, minus Durango-X maximum power rating (about 150 mA at 5V). While many power supplies are able to exceed this guaranteed minimum, caution is advised if your preipheral setup is going over 350 mA total as the PCB layout and tracks aren't intended for high intensities.

As always, the use of quality, brand-name power adapters is highly recommended, both for output stability and safety reasons.

Signal timing

IOx bus transactions are similar to regular memory accesses, thus Durango-X will assert the /SEL signal (qualified) for half a cycle, or about 325 nS; but peripherals are expected to respond in a reasonably faster fashion, to account for glue logic delays.

Note

Most modern revisions of the Durango computers are faster, down to a reasonable 125 nS transaction time. On the other hand, some other devices compatible with the IOx expansion bus (e.g. Chihuahua, Rosario SBCs) may use much longer transaction times; in any case, the peripheral device should keep the requested data until /SEL is negated or, if on a write transaction, latch the data at the rising edge of /SEL.

Address decoding

All peripherals should provide their own address decoding, although that could be a very simple circuit. In any case, no attached peripheral should write to the IOx bus unless the /SEL line is low and the current address is within its assigned range.

In most cases, a 74HC138 decoder is all that's needed.

Port assignations

In order to avoid conflicts, no attached peripherals should share any address, especially when expected to write to the bus. Note that the Read/Write line may be used as an extra address, if properly decoded.

A common address may be shared between peripherals, however, as long as they are never connected at the same time.

Here follows a list of currently produced or projected peripheral addresses. This will be frequently updated.

Address	Dir. (CPU)	Peripheral	Port description
`$0`	write	external VDU	Address High Latch
`$0`	read	FREE	-
`$1`	write	external VDU	Address Low Latch
`$1`	read	FREE	-
`$2`	write	external VDU	Data write
`$2`	read	FREE	some external VDUs may read* VRAM*
`$3`	I/O	Virtual Serial Port*	Data I/O
`$4`	I/O	Virtual Serial Port	Configuration
`$5`	I/O	FREE	-
`$6`	I/O	FastSPI	SPI Data R/W
`$7`	write	FastSPI with I2C	`D0...D3 = /SPI_DEV`, `D4 = I2C_SCL`, `D5 = I2C_SDA`
`$7`	write	nanoLink output (v1)	`D0=SERDAT`, `D1=SERCLK`
`$7`	read	FastSPI with I2C	Send SPI clock; return value is `D0...D3 = /SPI_DEV`, `D6 = I2C_SCL`, `D7 = I2C_SDA`
`$8`	write	Static RAM storage	Address High Latch
`$0`	read	FREE	-
`$9`	write	Static RAM storage	Address Low Latch
`$0`	read	FREE	-
`$A`	I/O	Static RAM storage	Data I/O
`$A`	I/O	PASK parallel port	Data I/O (currently input only)
`$B`	write	Matrix Keyboard	Select column
`$B`	read	Matrix Keyboard	Read rows
`$C`	write	Gamepads	Latch status
`$C`	read	Gamepad 0	Read status
`$D`	write	Gamepads	Shift data (NES only, but ignored by MD)
`$D`	read	Gamepad 1	Read status
`$E`	write	nanoLink output (v2+)	`D0=SERDAT`, `D1=SERCLK`
`$E`	read	FREE	may become Parallel GPIO, combining nanoLink and a bit-banged SPI interface
`$F`	I/O	RESERVED	-

Note

The Virtual Serial Port is not a real hardware device, but some software (especially in development) may access these ports.

Warning

The Static RAM card and the PASK keyboard/paralell port are incompatible and should NOT be connected at the same time! Older (v1) revisions of the nanoLink output board are incompatible with the FastSPI, but this will change in later revisions.